The TFT LCD Controller Reference Design from Digital Blocks enables hardware designers to accelerate the design-in of TFT LCD panel displays into their system. The Reference Design centers on Digital Blocks DB9000AVLN TFT LCD Controller IP Core, which is available in Altera® netlist or VHDL / Verilog RTL formats.
The DB9000AVLN contains an Altera Avalon® System Interconnect for interface to the NIOS® II processor and SDRAM or SRAM controllers. Either memory can serve as the Frame Buffer. Software supplied with the Reference Design runs on the NIOS®II processor to place an image in Frame Buffer memory and setup & invoke the DB9000AVLN to drive the LCD panel.
Utilizing Altera’s Quartus II tools, the Reference Design places into an Altera Cyclone® I, II, or III FPGA development kit. All Altera FPGAs are supported.
The user can connect their LCD panel to the development kit with the fabrication of an appropriate cable. Please contact Digital Blocks for more details
To learn more about the TFT LCD Controller Reference Design, please contact Digital Blocks.