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| Welcome to Digital Blocks |
Digital Blocks offers semiconductor Intellectual Property (IP) cores for developers
with Embedded Processor & Peripherals, High-Speed Networking, Display
Controller, Display Link Layer, 2D Graphics, and Audio / Video system
requirements.
We offer synthesizable RTL VHDL and Verilog IP cores for System-on-Chip
(SoC) ASSP, ASIC, and FPGA designers.
with Embedded Processor & Peripherals, High-Speed Networking, Display
Controller, Display Link Layer, 2D Graphics, and Audio / Video system
requirements.
We offer synthesizable RTL VHDL and Verilog IP cores for System-on-Chip
(SoC) ASSP, ASIC, and FPGA designers.
Programmable Interrupt Controllers
Our Programmable Interrupt Controller IP Core series consists of the DB8259A and DB8259S
interrupt controllers. Both are full-featured equivalents of the industry standard Intel 8259A /
Intersil 82C59A / NEC uPD8259 interrupt controllers. Available in VHDL and Verilog, these
8259 IP cores come with a comprehensive test suite, synthesis scripts, data sheet, and user manual.
We offers these IP Cores as part of its 82xx Peripherals Replacement Program in CPLDs &
FPGAs.
interrupt controllers. Both are full-featured equivalents of the industry standard Intel 8259A /
Intersil 82C59A / NEC uPD8259 interrupt controllers. Available in VHDL and Verilog, these
8259 IP cores come with a comprehensive test suite, synthesis scripts, data sheet, and user manual.
We offers these IP Cores as part of its 82xx Peripherals Replacement Program in CPLDs &
FPGAs.
Display Controllers
Our Display Controller series consists of the DB9000AXI4, DB9000AXI, DB9000AHB, the
DB9000OCP, and the DB9000AVLN LCD Controllers IP Cores and the DB6845 CRT
Controller IP Core.
The DB9000AXI TFT LCD Controller interfaces frame buffer memory and an ARM processor (or
any other high-performance processor) via the AMBA 4.0 AXI bus fabric to TFT LCD panels.
The DB9000AXI contains a 256 / 128 / 64 or 32-bit interface to frame buffer memory, and
contains a programmable option to drive a 1 Port or 2 Port LCD Interface. We optionally offer a
LVDS link layer interface. The DB9000AXI is particularly geared to drive high resolutions panels,
including HD displays. Available in Verilog, the DB9000AXI IP core comes with a comprehensive
simulation test suite, Synopsys Design Constraints for synthesis, and a user manual.
The DB9000AXI4 builds on the AXI version, with the addition of AXI Specfication 2.0 higher
burst lengths (greater than 16 beats per memory request) and Quality of Service (QoS) capabilities.
The DB9000AHB TFT LCD Controller interfaces frame buffer memory and an ARM processor via
the AMBA 2.0 AHB bus fabric to TFT LCD panels. Available in Verilog and VHDL, the
silicon-verified DB9000AHB IP core comes with a comprehensive test suite, synthesis scripts, data
sheet, and user manual.
The DB9000OCP TFT LCD Controller interfaces frame buffer memory and a variety of
processors via the Open Core Protocol Specification 2.2 interface to TFT LCD panels. Available
in Verilog and VHDL, the silicon-verified DB9000OCP IP core comes with a comprehensive test
suite, synthesis scripts, data sheet, and user manual.
The DB9000AVLN TFT LCD Controller interfaces frame buffer memory and an Altera® NIOS®
II processor via the Altera Avalon® Bus to TFT LCD panels. Available in Verilog and VHDL, the
silicon-verified DB9000AVLN IP core comes with a comprehensive test suite, software driver,
synthesis scripts, data sheet, and user manual.
DB9000OCP, and the DB9000AVLN LCD Controllers IP Cores and the DB6845 CRT
Controller IP Core.
The DB9000AXI TFT LCD Controller interfaces frame buffer memory and an ARM processor (or
any other high-performance processor) via the AMBA 4.0 AXI bus fabric to TFT LCD panels.
The DB9000AXI contains a 256 / 128 / 64 or 32-bit interface to frame buffer memory, and
contains a programmable option to drive a 1 Port or 2 Port LCD Interface. We optionally offer a
LVDS link layer interface. The DB9000AXI is particularly geared to drive high resolutions panels,
including HD displays. Available in Verilog, the DB9000AXI IP core comes with a comprehensive
simulation test suite, Synopsys Design Constraints for synthesis, and a user manual.
The DB9000AXI4 builds on the AXI version, with the addition of AXI Specfication 2.0 higher
burst lengths (greater than 16 beats per memory request) and Quality of Service (QoS) capabilities.
The DB9000AHB TFT LCD Controller interfaces frame buffer memory and an ARM processor via
the AMBA 2.0 AHB bus fabric to TFT LCD panels. Available in Verilog and VHDL, the
silicon-verified DB9000AHB IP core comes with a comprehensive test suite, synthesis scripts, data
sheet, and user manual.
The DB9000OCP TFT LCD Controller interfaces frame buffer memory and a variety of
processors via the Open Core Protocol Specification 2.2 interface to TFT LCD panels. Available
in Verilog and VHDL, the silicon-verified DB9000OCP IP core comes with a comprehensive test
suite, synthesis scripts, data sheet, and user manual.
The DB9000AVLN TFT LCD Controller interfaces frame buffer memory and an Altera® NIOS®
II processor via the Altera Avalon® Bus to TFT LCD panels. Available in Verilog and VHDL, the
silicon-verified DB9000AVLN IP core comes with a comprehensive test suite, software driver,
synthesis scripts, data sheet, and user manual.
The DB6845 CRT Controller is a full-featured equivalent to the industry standard MC6845.
Available in VHDL, the DB6845 CRT Controller is a customer-proven IP core available with a
comprehensive test suite, synthesis scripts, data sheet, and user manual.
Available in VHDL, the DB6845 CRT Controller is a customer-proven IP core available with a
comprehensive test suite, synthesis scripts, data sheet, and user manual.
Video Signal & Image Processing
Our Video Signal Processing IP Core consists of the DB1800 NTSC / PAL / SECAM Video
Sync Separator. The DB1800 accepts a composite video signal and outputs horizontal sync,
vertical sync, chroma burst blanking, and field 1 or 2 detection. Available in Verilog, this IP core
comes with a comprehensive test suite, synthesis scripts, data sheet, and user manual.
Sync Separator. The DB1800 accepts a composite video signal and outputs horizontal sync,
vertical sync, chroma burst blanking, and field 1 or 2 detection. Available in Verilog, this IP core
comes with a comprehensive test suite, synthesis scripts, data sheet, and user manual.
Programmable Keyboard / Display Interface
Programmable Peripheral Interface
Our Programmable Peripheral Interface IP Core consists of the DB8255A, providing 24 lines of
programmable I/O. The DB8255A is a full-featured equivalent to the industry standard Intel
8255A / 82C55A and Intersil 82C55A. Available in VHDL, this IP core comes with a
comprehensive test suite, synthesis scripts, data sheet, and user manual. We offers this IP Core as
part of its 82xx Peripherals Replacement Program in CPLDs & FPGAs.
programmable I/O. The DB8255A is a full-featured equivalent to the industry standard Intel
8255A / 82C55A and Intersil 82C55A. Available in VHDL, this IP core comes with a
comprehensive test suite, synthesis scripts, data sheet, and user manual. We offers this IP Core as
part of its 82xx Peripherals Replacement Program in CPLDs & FPGAs.
Our Programmable Keyboard / Display Interface IP Core consists of the DB8279, which
simultaneously and independently interfaces a keyboard and display to a microprocessor. The
DB8279 is equivalent to the industry standard Intel 8279. Available in VHDL, this IP core comes
with a comprehensive test suite, synthesis scripts, data sheet, and user manual. We offers this IP
Core as part of its 82xx Peripherals Replacement Program in CPLDs & FPGAs.
simultaneously and independently interfaces a keyboard and display to a microprocessor. The
DB8279 is equivalent to the industry standard Intel 8279. Available in VHDL, this IP core comes
with a comprehensive test suite, synthesis scripts, data sheet, and user manual. We offers this IP
Core as part of its 82xx Peripherals Replacement Program in CPLDs & FPGAs.
| Copyright © Digital Blocks, Inc. 2005-2012. ALL RIGHTS RESERVED |
| What's New |
I2C - Inter-Integrated Circuit Controller
| The DB9000AVLN is SOPC Builder Ready and AMPP Approved by Altera Corporation. |
| The SOPC Builder Ready designation by Altera certifies the DB9000AVLN IP Core contains an Avalon compatible bus interface, SOPC Builder support files, push-button SOPC Builder flow, software support files, and that the DB9000AVLN is both software and hardware tested. |
| The AMPP Approved Certification designation by Altera certifies the DB9000AVLN IP Core compiles in the Altera standard design software flow, is optimized for the most current Altera device architectures, and includes good quality documentation. |
Digital Blocks' I2C Controller IP Cores consists of the DB-I2C-M-APB for the AMBA 2.0 APB
Bus and the DB-I2C-M-AVLN for the Avalon Bus. The I2C Controllers are offered with
parameterized FIFOs and Smart Control for processors with high performance algorithm
requirements, in a Master only function for a small VLSI footprint. Available in Verilog, this IP core
comes with a comprehensive test suite, synthesis scripts, data sheet, C software directing I2C Bus
tranactions, and a user manual.
Bus and the DB-I2C-M-AVLN for the Avalon Bus. The I2C Controllers are offered with
parameterized FIFOs and Smart Control for processors with high performance algorithm
requirements, in a Master only function for a small VLSI footprint. Available in Verilog, this IP core
comes with a comprehensive test suite, synthesis scripts, data sheet, C software directing I2C Bus
tranactions, and a user manual.
Building on our IP cores, Digital Blocks design services can customize the IP core
to your unique requirements, as well as develop higher level system solutions
encompassing FPGA, printed circuit board, and software design.
to your unique requirements, as well as develop higher level system solutions
encompassing FPGA, printed circuit board, and software design.
We offer a Reference Design for the DB9000AVLN, whereby a user can place the DB9000AVLN
LCD Controller in an inexpensive Altera FPGA development kit and connect-up the LCD panel of
their choice. Along with software, the user can start building their application software right away.
LCD Controller in an inexpensive Altera FPGA development kit and connect-up the LCD panel of
their choice. Along with software, the user can start building their application software right away.
Digital Blocks Qualifies the DB9000 TFT LCD Controller IP Core for High Resolution Medical, Industrial, Monitor, and Cinema Applications |
15 March 2011
30 Dec 2010
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28 April 2011
| Digital Blocks Announces DB8051C Microcontroller IP Core for Complex Finite State Machine Development |
8051 Microcontrollers
Digital Blocks 8051 Microcontroller ( MCU ) Verilog IP Cores for ASIC / ASSP / FPGA
integration consists of the DB8051C IP, which contains the MCS®51 standard peripherals &
the DB8051C-FSM, which contains Digital Blocks DB8051C CPU Core with up to 800 I/O
for programmable, complex Finite State Machine control applications. For more information,
please visit the Digital Blocks 8051 Microcontroller Verilog IP Cores product page.
Digital Blocks 8051 Microcontroller ( MCU ) Verilog IP Cores for ASIC / ASSP / FPGA
integration consists of the DB8051C IP, which contains the MCS®51 standard peripherals &
the DB8051C-FSM, which contains Digital Blocks DB8051C CPU Core with up to 800 I/O
for programmable, complex Finite State Machine control applications. For more information,
please visit the Digital Blocks 8051 Microcontroller Verilog IP Cores product page.
1 July 2011
| Digital Blocks Expands the DB9000 TFT LCD Controller IP Core Family with Support for the AMBA AXI4 Interconnect |
10 May 2011
BitBLT & 2D Graphics Engines
Our BitBLT & 2D Graphics Engine IP Cores offer hardware acceleration of Bitmap manipulation & 2D
Graphics Rendering. The series consists of the DB9100AXI4, DB9100AXI, DB9100AHB, and
DB9100AVLN Verilog IP Cores. The DB9100 family of BitBLT & 2D Graphics IP complement the
DB9000 family of TFT LCD Controller IP.
Graphics Rendering. The series consists of the DB9100AXI4, DB9100AXI, DB9100AHB, and
DB9100AVLN Verilog IP Cores. The DB9100 family of BitBLT & 2D Graphics IP complement the
DB9000 family of TFT LCD Controller IP.