Digital Blocks IP Cores Product Portfolio

 

Display Controllers

Digital Blocks’ Display Controller Verilog IP Cores consists of the DB9000AXI4, DB9000AXI, DB9000AXI-UHD, DB9000AXI-DCI, DB9000AHB, DB9000OCP and DB9000AVLN LCD Controllers and the DB6845 CRT Controller.

Display Controllers
DB9000AX14
 LCD Controller-TFT LCD Panels (AXI4 Bus)
DB9000AXI
 LCD Controller- TFT LCD Panels (AXI Bus)
DB9000AHB
 LCD Controller- TFT LCD Panels (AHB Bus)
DB9000AHB-Lite
 LCD Controller- TFT LCD Panels (AHB-Lite Bus)
DB9000OCP
 LCD Controller- TFT LCD Panels (OCP Bus)
DB9000AVLN
 LCD Controller- TFT LCD Panels (Avalon Bus)
DB9000AXI-UHD
 LCD Controller- Ultra HD TFT LCD Panels (AXI4/AXI Bus)
DB9000AXI-DCI
 LCD Controller- 4K Digital Cinema LCD Panels (AXI4/AXI Bus)
DB6845
 Motorola MC6845 Functional Equivalent CRT Controller

 

Display Link Layer Interface

Digital Blocks’ Display Link Layer Verilog IP Cores consists of the DB-FPD-LVDS-TX for LVDS Interfaces to 1 and 2 Port LCD Panels, up to Ultra HD Resolutions.

Display Link Layer Interface
DB-FPD-LVDS-TX  FPD LVDS Display Interface, 1 Port / 2 Port LCD Panel

 

2D Graphics Hardware Accelerator Engines

Digital Blocks 2D Graphics Hardware Accelerator Verilog IP Cores consists of the DB9200AXI4, DB9200AXI, DB9200AHB, and DB9200AVLN.

2D Graphics Hardware Accelerator Engines
DB9200AXI4  2D Graphics Hardware Accelerator (AXI4 Bus)
DB9200AXI  2D Graphics Hardware Accelerator (AXI Bus)
DB9200AHB  2D Graphics Hardware Accelerator (AHB Bus)

 

BitBLT Graphics Hardware Accelerator Engines

Digital Blocks BitBLT Graphics Hardware Accelerator Verilog IP Cores consists of the DB9100AXI4, DB9100AXI, DB9100AHB, and DB9100AVLN.

BitBLT Graphics Hardware AcceleratorEngines
DB9100AXI4  BitBLT Graphics Hardware Accelerator (AXI4 Bus)
DB9100AXI  BitBLT Graphics Hardware Accelerator (AXI Bus)
DB9100AHB  BitBLT Graphics Hardware Accelerator (AHB Bus)
DB9100AVLN  BitBLT Graphics Hardware Accelerator (Avalon Bus)

Video Signal & Image Processing

Digital Blocks’ Video Signal Processing series consists of the DB1800 NTSC / PAL/ SECAM Video Sync Separator, DB1810 Color Space Converter, DB1820 4:4:4 Y’CbCr to 4:2:2 Y’CbCr Chroma Resampler, DB1825 combined Color Space Converter & Chroma Resampler, DB1830 BT.656 Encoder, and the DB1892 RGB to CCIR601/656 Encoder.

Video Signal & Image Processing
DB1800   Standard Definition NTSC/PAL/SECAM Video Sync Separator
DB1810   Color Space Converter
DB1820   4:4:4 Y’CbCr to 4:2:2 Y’CbCr Chroma Resampler (ITU-R BT.601)
DB1825   Color Space converter & Chroma Resampler- 4:4:4 RGB to 4:2:2 Y’CbCr
DB1830   ITU-R BT.656 Encoder
DB1840   ITU-R BT.656 Decoder
DB1845   ITU-R BT.1120 Decoder – HD 1920x1080p
DB1892   RGB to ITU-R 601/656 Encoder
DB1881   Camera Interface (AHB Bus)

 

Direct Memory Access (DMA) Controller

Digital Blocks’ DMA Controller Verilog IP Cores consist of the DB-DMAC-MC-AMBA, supporting 1 – 32 DMA transfers among 1 – 32 interfaces, including AMBA AXI / AHB / APB. A fixed configuration DB-DMAC-MC-AHB offers 1-4 DMA Channels, 1-2 AHB Master Interfaces, and 1-5 User Peripheral Interfaces. A fixed DB-DMAC-MC-AXI targets high performance AXI Backbone data transfers.

All Multichannel DMA Controllers support Descriptor Scatter-Gather List (SGL) data transfers or direct CPU register programing, with releases targeting CPU AXI/AHB backbone DMA Engines, DMA Engine for PCI Express, or Peripheral high/low data-rate DMA transfers.

 

Multi-Channel DMA Controller
DB-DMAC-MC-AMBA  DMA Controller, 1-32 Channels, 1-32 User Port Interfaces Including AXI / AHB /  APB
DB-DMAC-MC-AXI  DMA Controller, 1-32 Channels, 1-16 AXI4 / AXI3 Interfaces
DB-DMAC-MC-AHB  DMA Controller, 1-4 Channels, 1-2 AHB Master  Interfaces, 1-5 User Port Interfaces

 

Low-Latency, High-Speed Networking

Digital Blocks DB-UDP-IP ultra-low latency IP/UDP Protocol Hardware Stack Verilog IP Core targets leading-edge network adapter cards with one or more 10/100/1000 MbE or 10/40/100 GbE network links to implement low latency network servers.

The DB-RTP-UDP-IP-AV adds RTP hardware processing to 10/100/1000 MbE or 10/40/100 GbE network links and targets Audio/Video Packet Processing such as a IP/UDP/RTP interface to H.264/H.265 CODECs. Both IP Cores contain MAC Layer Pre- & Post-Processing and an ARP Packet Processing for a FPGA or ASIC networking adapter card solution.

 

Low-Latency, High-Speed Networking – Protocol Stacks
DB-UDP-IP  IP/UDP Protocol Hardware Stack
DB-RTP-UDP-IP-AV  RTP/UDP/IP Protocol Hardware Stack – Audio/Video Packet Processing
DB-RTP-UDP-IP-MPEG-TS  MPEG Transport Stream with RTP/UDP/IP Protocol Hardware Stack – Audio/Video Packet  Processing
DB-UDP-IP-TX  IP/UDP Protocol Hardware Stack – Transmit to Network only
DB-UDP-IP-RX  IP/UDP Protocol Hardware Stack – Receive from Network only

 

MIPI I3C Master/Slave – Inter-Integrated Circuit Controller

Digital Blocks MIPI I3C Master/Slave Controller Verilog IP Cores consists of the DB-I3C-MS-APB, DB-I3C-MS-AHB, DB-I3C-MS-AXI for the AMBA Bus and the DB-I3C-MS-AVLN for the Avalon Bus. The MIPI I3C Controllers are offered with parameterized FIFOs and Finite State Machine control for off-loading the I3C Controller Master & Slave functions from the processor.

Display Link Layer Interface
DB-I3C-MS-APB I3C Controller IP- Master / Slave, Parameterized FIFO, APB Bus

 

I2C Master/Slave – Inter-Integrated Circuit Controller

Digital Blocks I2C Master/Slave Controller Verilog IP Cores consists of the DB-I2C-MS-APB, DB-I2C-MS-AHB, DB-I2C-MS-AXI, DB-I2C-M-Hs-Mode for the AMBA Bus and the DB-I2C-MS-AVLN for the Avalon Bus. The I2C Controllers are offered with parameterized FIFOs and Finite State Machine control for off-loading the I2C Controller Master & Slave functions from the processor.

Digital Blocks I2C Master-only Controller Verilog IP Cores consists of the DB-I2C-M-APB, DB-I2C-M-AHB, DB-I2C-M-AXI, DB-I2C-M-Hs-Mode for the AMBA Bus and the DB-I2C-M-AVLN for the Avalon Bus. The I2C Controllers are offered with parameterized FIFOs and Finite State Machine control for off-loading the I2C Controller function from the processor. The I2C Master-only version offers a smaller VLSI footprint.

Digital Blocks I2C Slave-only Controller Verilog IP Core consists of the DB-I2C-S and DB-I2C-S-SCL-CLK and DB-I2C-S-Hs-Mode, which interfaces an I2C Bus to internal user Registers or Memory (SDRAM / SRAM / Flash / FIFO) or any Peripheral or CPU directly connected to an internal AXI / AHB / APB / Avalon Bus. The I2C Slave-only version offers a smaller VLSI footprint.

All Digital Blocks I2C Controllers optionally support SMBus timing & protocol and HID-I2C (Human Interface Device over I2C Protocol Specification). I2C Slave Controllers work with MIPI I3C Master Controllers. Contact Digital Blocks for more information.

 

I2C Master/Slave – Inter-Integrated Circuit Controller
DB-I2C-MS-AVLN  I2C Controller IP- Master / Slave, Parameterized FIFO, Avalon Bus
DB-I2C-MS-APB  I2C Controller IP- Master / Slave, Parameterized FIFO, APB Bus
DB-I2C-MS-AHB  I2C Controller IP- Master / Slave, Parameterized FIFO, AHB Bus
DB-I2C-MS-AXI  I2C Controller IP- Master / Slave, Parameterized FIFO, AXI Bus
DB-I2C-MS-Hs-Mode  I2C Controller IP – Master / Slave, Parameterized FIFO, Hs-Mode (3.4 Mbps)  AXI/AHB/APB/Avalon Buses
DB-I2C-MS-SMBUS-AMBA  I2C/SMBus Controller IP – Master / Slave, Parameterized FIFO, AXI/AHB/APB/Avalon Buses,  SMBus Protocol
I2C Master – Inter-Integrated Circuit Controller
DB-I2C-M-AVLN  I2C Controller IP – Master, Parameterized FIFO, Avalon Bus
DB-I2C-M-APB  I2C Controller IP – Master, Parameterized FIFO, APB Bus
DB-I2C-M-AHB  I2C Controller IP – Master, Parameterized FIFO, AHB Bus
DB-I2C-M-AXI  I2C Controller IP – Master, Parameterized FIFO, AXI Bus
DB-I2C-M-Hs-Mode  I2C Controller IP – Master, Parameterized FIFO, Hs-Mode (3.4 Mbps) AXI/AHB/APB/Avalon Buses
I2C Slave – Inter-Integrated Circuit Controller
DB-I2C-S-AVLN  I2C Controller IP – Slave, Parameterized FIFO, Avalon Bus
DB-I2C-S-APB  I2C Controller IP – Slave, Parameterized FIFO, APB Bus
DB-I2C-S-AHB  I2C Controller IP – Slave, Parameterized FIFO, AHB Bus
DB-I2C-S-AXI  I2C Controller IP – Slave, Parameterized FIFO, AXI Bus
DB-I2C-S-Hs-Mode  I2C Controller IP – Slave, Parameterized FIFO, Hs-Mode (3.4 Mbps) AXI/AHB/APB/Avalon Buses  or direct to/from Registers or Memory
DB-I2C-S-REG  I2C Controller IP – Slave, User Register Interface, No CPU Required
DB-I2C-S-SCL-CLK  I2C Controller IP – Slave, SCL Clock only, principally for configuring registers in mixed-signal ICs  with low noise or low power requirements
DB-I2C-S-SCL-CLK-APB  I2C Controller IP – Slave, SCL Clock, Parameterized FIFO, APB Bus. For low power requirements  in I2C Slave Controller interface to CPU.

 

SPI Master/Slave – Serial Peripheral Interface Controller

Digital Blocks’ SPI Master/Slave Controller Verilog IP Cores consists of the DB-SPI-MS-APB, DB-SPI-MS-AHB, DB-SPI-MS-AXI for the AMBA Bus and the DB-SPI-MS-AVLN for the Avalon Bus. Digital Blocks also offers a Master-only SPI Controller for AMBA Bus. The SPI Controllers are offered with parameterized FIFOs and Finite State Machine control for off-loading the SPI Controller Master & Slave functions from the processor. In addition, the DB-SPI-FLASH-MEM-AXI is a Quad SPI Flash Controller IP providing Boot & Execute-In-Place (XIP) functions via an AXI Slave Interface. The DB-eSPI-MS-AMBA supports the Enhanced SPI Specification.

 

SPI Master/Slave – Serial Peripheral Interface Controller
DB-eSPI-MS-AMBA  Enhanced SPI Controller IP- Master/Slave, Parameterized FIFO, AMBA APB / AHB / AXI Bus
DB-SPI-MS-AMBA  SPI Controller IP- Master/Slave, Parameterized FIFO, AMBA APB / AHB / AXI Bus
DB-SPI-M-AMBA  SPI Controller IP- Master-only, Parameterized FIFO, AMBA APB / AHB / AXI Bus
DB-SPI-S-AMBA  SPI Controller IP- Slave-only, Parameterized FIFO, AMBA APB / AHB / AXI Bus
DB-SPI-MS-AVLN  SPI Controller IP- Master/ Slave, Parameterized FIFO, Avalon Bus
DB-SPI-FLASH-MEM-AHB  QSPI Flash Memory Controller IP – Boot, Execute-In-Place (XIP) via AHB, Programmable IO  (PIO) via second AMBA Interconnect
DB-SPI-FLASH-MEM-AXI  QSPI Flash Memory Controller IP – Boot, Execute-In-Place (XIP) via AXI, Programmable IO  (PIO) via second AMBA Interconnect

 

DB8051 Microcontroller with Configurable Peripherals

Digital Blocks 8051 Microcontroller Unit (MCU) Verilog IP Cores for ASIC / ASSP / FPGA integration consists of the DB8051C CPU Core, the industry’s smallest VLSI area 8051 MCU; the DB8051C-SP, which contains the MCS®51 standard peripherals; the DB8051C-CP, which contains user selectable peripherals; and the DB8051C-FSM, which contains Digital Blocks DB8051C CPU Core with up to 800 I/O for programmable, Finite State Machine control applications.

DB8051 Microcontroller
DB8051C-SP  8051 Microcontroller IP Core – Standard MCS 51 Peripherals
DB8051C-CP  8051 Microcontroller IP Core – Configurable Peripherals
DB8051C-FSM  8051 Microcontroller IP Core – Finite State Machine Applications
DB8051C  8051 Microcontroller IP Core – Compact CPU Core

 

Industry Standard Architecture Peripheral Controllers

Digital Blocks’ Programmable Interrupt Controller (PIC) Verilog & VHDL IP Cores consists of the DB8259A (no clock matching the original i8259A device) and DB8259S (enhanced by Digital Blocks with an all clock design) interrupt controllers. The DB8259A is a full functional equivalent to the i8259A and matches on a per cycle basis while the DB8259S just adds a clock cycle delay to the interrupt output, but the design is streamlined for modern ASIC / ASSP tool flows.

Digital Blocks’ Programmable Peripheral Interface VHDL IP Core consist of the DB8255A, providing 24 lines of programmable I/O. The DB8255A is a full functional equivalent to the i8255A and matches on a per cycle basis.

Digital Blocks’ Programmable Keyboard / Display Interface VHDL IP Core consist of the DB8279, simultaneously and independently interfacing a keyboard and display to a microprocessor. The DB8279 is a full functional equivalent to the i8279 and matches on a per clock cycle basis.

Digital Blocks offers the DB8255, DB8259, and DB8279 part of its 82xx Peripherals Replacement Program in CPLDs & FPGAs.

 

Programmable Interrupt Controllers
DB8259A  Intel 8259A Functional Equivalent Programmable Interrupt Controller
DB8259S  Intel 8259A Functional Equivalent Programmable Interrupt Controller
Programmable Peripheral Interface
DB8255A  Intel 8255A Functional Equivalent Programmable Peripheral Interface
Programmable Keyboard/Display Inteface
DB8279  Intel 8279 Functional Equivalent Programmable Keyboard/Display Interface