DB9000AXI Display Processor

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Digital Blocks DB9000AXI Display Processor interfaces Frame Buffer Memory via the AMBA AXI Protocol fabric to a

Display Panel with programmable resolutions from 320×240 (QVGA) up through 4K/8K UHD. With optional advance features such as the following:

  • Frame Descriptor Engine
  • Multi-Layer Composition – from 1 to 16 layers
  • Arm TrustZoneĀ® Secure display layer
  • Frame Buffer Compression
  • Color Space Convertion
  • Hardware Cursor
  • High Dynamic Range (HDR)

The DB9000 Display Controller & Processor family of IP Cores is an ASIC/FPGA design teams most versitile choice.