DB9000AXI Display Controller

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Digital Blocks DB9000AXI Display Controller interfaces Frame Buffer Memory via the AMBA AXI Protocol fabric to a Display Panel with programmable resolutions from 320×240 (QVGA) up through 2K/4K/8K. With optional advance features such as the following:

  • Multi-Layer Composition – from 1 to 16 layers
  • Frame Buffer Compression
  • Color Space Conversion
  • Hardware Cursor
  • High Dynamic Range (HDR)
  • Frame Descriptor Engine
  • Arm TrustZoneĀ® Secure display layer

The DB9000 Display Controller & Processor family of IP Cores is an ASIC/FPGA design teams most versatile choice.