Digital Blocks DB9000 TFT LCD and OLED Display Controller & Processor IP Application Leadership Advancements
(09 Nov 2021)

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Digital Blocks DB9000 Display Controller & Processor IP Core Family Extends Leadership Across Medical, Industrial, Aerospace, Automotive, Communications, Computer, Monitor, Consumer, IoT, AR/VR Headsets, Wearables, Signage, and Cinema Applications


GLEN ROCK, New Jersey, November 09, 2021 – Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers with display controller, 2D graphics, or video processing requirements, extends the leadership of the DB9000 Display Controller & Processor IP Core Family across a wide range of applications.


The DB9000 Display Controller & Processor IP is offered with a customer-specific range of features, supporting basic display applications. Advanced releases add optional features, such as support for multiple graphics or video layers, video up-sampling, composition, compressed frame buffer, color space conversion, hardware cursor, and high dynamic range (HDR).


The DB9000 Display Controller & Processor IP Core supports LCD and OLED panel resolutions from 240×240 up to 8192×8192, with 1,2,4,8,16,18,24,30,32, and 36-bit bits-per-pixel, both RGB and YCrCb color spaces, with interfaces to 1, 2, 4, & 8 port LVDS, MIPI DSI, DVI, HDMI, V-by-One, and DisplayPort.


The DB9000 IP Core supports SoC fabrics interfacing to DDRn DRAM frame buffer memory with memory controller 32-, 64-, 128-, or 256-bit data widths, supporting AXI4, AXI3, AHB, AHB-Lite and Avalon protocols. With respect to the AXI protocol, the DB9000 supports multiple outstanding memory requests, supporting higher resolution panels.


Support for high resolution LCD and OLED panels includes Full High Definition (FHD), Ultra HD (UHD/Quad FHD), Digital Cinema Systems (DCI) 2K & 4K images, and 8K 7680×4320. A representative listing follows: