Digital Blocks Extends UDP/IP Networking Verilog Core to 50 and 100 GbE (28 Dec 2019)

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GLEN ROCK, New Jersey, December 30, 2019 – Digital Blocks, a leading developer of silicon-proven semiconductor Intellectually Property (IP) soft cores for system-on-chip (SoC) ASIC, ASSP, & FPGA developers with Embedded Processor & Peripherals requirements, extends its leadership of low-latency, high performance UDP/IP networking Verilog Cores with releases for 50 & 100 GbE networks.

These releases join Digital Blocks 1 GbE, 10 GbE, 25 GbE, & 40 GbE UDP Hardware Protocol Stacks IP Cores.

Advanced Features
The UDP IP Core supports IPv4, ICMP, IGMP, ARP, DHCP, VLAN & Jumbo frames. On the network side, the interface support Ethernet MAC’s from Intel/Altera, Xilinx, and Synopsys.

Download the full press release>>